发明授权
US4511814A Semiconductor analog switch circuit with compensation means to minimize
offset of output voltage
失效
半导体模拟开关电路具有补偿装置，以最大限度地减小输出电压的偏移
- 专利标题： Semiconductor analog switch circuit with compensation means to minimize offset of output voltage
- 专利标题（中）： 半导体模拟开关电路具有补偿装置，以最大限度地减小输出电压的偏移
-
申请号： US445038申请日： 1982-11-29
-
公开(公告)号： US4511814A公开(公告)日： 1985-04-16
- 发明人: Kenji Matsuo , Eiji Masuda
- 申请人： Kenji Matsuo , Eiji Masuda
- 申请人地址： JPX
- 专利权人： Tokyo Shibaura Denki Kabushiki Kaisha
- 当前专利权人： Tokyo Shibaura Denki Kabushiki Kaisha
- 当前专利权人地址： JPX
- 优先权： JPX56-192251 19811130
- 主分类号： H03K17/14
- IPC分类号： H03K17/14 ; H03K17/687 ; H03K17/16 ; H03K17/693 ; H03K19/096
摘要：
A semiconductor analog switch circuit device is disclosed in which a second analog switch circuit is connected in parallel with a first analog switch circuit. The first and second switch circuits are controlled by control pulses with opposite phases. An input signal is applied to one of the parallel junctions of the first and second analog switch circuits, while an output signal is derived from the other parallel junction.
公开/授权文献
信息查询
