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US4580213A Microprocessor capable of automatically performing multiple bus cycles 失效
能够自动执行多个总线周期的微处理器

Microprocessor capable of automatically performing multiple bus cycles
摘要:
A microprocessor is disclosed having a bus controller which is capable of automatically performing multiple bus cycles in response to a multi-cycle signal received from the control unit. The bus controller includes means for automatically incrementing the access address provided by the control unit, and for controlling the transfer of the data between the bus and respective destinations in the control units.
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