发明授权
US4599521A Bias circuit with voltage and temperature compensation for an emitter
coupled logic circuit
失效
偏置电路,具有发射极耦合逻辑电路的电压和温度补偿
- 专利标题: Bias circuit with voltage and temperature compensation for an emitter coupled logic circuit
- 专利标题(中): 偏置电路,具有发射极耦合逻辑电路的电压和温度补偿
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申请号: US453113申请日: 1982-12-27
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公开(公告)号: US4599521A公开(公告)日: 1986-07-08
- 发明人: Yasunori Kanai , Eiji Sugiyama , Kazumasa Nawata
- 申请人: Yasunori Kanai , Eiji Sugiyama , Kazumasa Nawata
- 申请人地址: JPX Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX56-214807 19811229
- 主分类号: G05F3/22
- IPC分类号: G05F3/22 ; H03K19/086 ; H03K19/003 ; H03K19/092 ; H03K19/098
摘要:
A bias circuit for providing a reference voltage to an output circuit, for example, an ECL circuit in an LSI. The bias circuit is able to operate at a lower power supply voltage of about -2 V and includes a first transistor having an emitter which is connected to a power supply and a base and a collector commonly connected through an impedance circuit to ground. The bias circuit is also connected to the output circuit, whereby heat generation in the LSI is decreased.
公开/授权文献
- US4953037A Original reading apparatus 公开/授权日:1990-08-28
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