发明授权
US4604644A Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making 失效
用于将半导体器件连接到具有改善的疲劳寿命的衬底的焊接互连结构以及制造工艺

Solder interconnection structure for joining semiconductor devices to
substrates that have improved fatigue life, and process for making
摘要:
An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate having a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of the semiconductor device to a corresponding set of solder wettable pads on a substrate, the improvement being a band of dielectric organic material disposed between and bonded to the device and substrate embedding at least an outer row of solder connections leaving the center inner solder connections and the adjacent top and bottom surfaces free of dielectric material.
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