发明授权
- 专利标题: Semiconductor device
- 专利标题(中): 半导体器件
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申请号: US921811申请日: 1986-10-21
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公开(公告)号: US4680600A公开(公告)日: 1987-07-14
- 发明人: Akinori Tahara , Hiromu Enomoto , Yasushi Yasuda
- 申请人: Akinori Tahara , Hiromu Enomoto , Yasushi Yasuda
- 申请人地址: JPX Kanagawa
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JPX Kanagawa
- 优先权: JPX58-116954 19830630
- 主分类号: H01L27/04
- IPC分类号: H01L27/04 ; H01L21/822 ; H01L23/60 ; H01L27/02 ; H01L29/861 ; H03K19/003 ; H01L29/56 ; H01L29/90
摘要:
A semiconductor device such as a TTL-type integrated circuit device which has an input protection circuit for each inner circuit, e.g., each TT logic gate. The input protection circuit is formed on a semiconductor substrate of a first conductivity type, and includes a first impurity region having a second conductivity type connected to an external terminal and an island-shape formed on the semiconductor substrate surrounded by an isolation region having the first conductivity type. The device also includes a clamp diode formed on an electrode layer contacting with the first impurity region. The device further includes a PN junction type protection diode formed on a second impurity region having the first conductivity type; the protection diode crosses the first impurity region between the clamp diode and a portion of the first impurity region connected to the external terminal and reaches the isolation region. The reverse withstand voltage of the PN junction type protection diode is smaller than that of the clamp diode, thereby preventing excessive reverse current flow and avoiding permanent destruction of the clamp diode.
公开/授权文献
- US5879467A Cycle purging a vacuum chamber during bakeout process 公开/授权日:1999-03-09
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