发明授权
- 专利标题: Comparator with cascaded latches
- 专利标题(中): 具有级联锁存器的比较器
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申请号: US866317申请日: 1986-05-23
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公开(公告)号: US4691189A公开(公告)日: 1987-09-01
- 发明人: Andrew G. F. Dingwall , Victor Zazzu
- 申请人: Andrew G. F. Dingwall , Victor Zazzu
- 申请人地址: NJ Princeton
- 专利权人: RCA Corporation
- 当前专利权人: RCA Corporation
- 当前专利权人地址: NJ Princeton
- 主分类号: H03K5/24
- IPC分类号: H03K5/24 ; H03M1/00 ; H03M1/34
摘要:
In a comparator circuit, first and second latchable circuits are connected in cascade between the output of an amplifying stage and the input of a decoder to enable the comparator to operate at significantly higher frequencies with lower error levels. An input signal, to be sampled, and a reference signal are applied to the input of the amplifying stage and a "sampled" signal indicative of the difference between the input and the reference is produced at the output of the amplifying stage. The "sampled" signal produced at the output of the amplifying stage is first processed, via the first latchable circuit operated in a regenerative mode to enhance the signal, during one time interval. The enhanced signal is then processed via the second latchable circuit operated in a regenerative mode tending to further enhance the signal, during a second, succeeding, time interval, for application to the decoder.
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