发明授权
US4717682A Method of manufacturing a semiconductor device with conductive trench
sidewalls
失效
制造具有导电沟槽侧壁的半导体器件的方法
- 专利标题: Method of manufacturing a semiconductor device with conductive trench sidewalls
- 专利标题(中): 制造具有导电沟槽侧壁的半导体器件的方法
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申请号: US830928申请日: 1986-02-19
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公开(公告)号: US4717682A公开(公告)日: 1988-01-05
- 发明人: Shin-ichi Taka , Jiro Ohshima , Masahiro Abe , Masaharu Aoyama
- 申请人: Shin-ichi Taka , Jiro Ohshima , Masahiro Abe , Masaharu Aoyama
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX60-30576 19850220
- 主分类号: H01L21/76
- IPC分类号: H01L21/76 ; H01L21/265 ; H01L21/302 ; H01L21/3065 ; H01L21/74 ; H01L21/283
摘要:
A method of manufacturing a semiconductor device, comprising the steps of sequentially forming a buried region and an epitaxial layer on a major surface of a semiconductor substrate, forming a conductive layer along an annular trench extending to the buried region, filling the annular trench with an insulating material and forming a functional element in said epitaxial layer surrounded by said buried region and said insulating material within said annular trench. In this method, the step of forming the conductive layer along the annular trench is carried out by the steps of forming an annular trench extending through said buried region, and depositing a conductive layer on only a side wall surface of said annular trench.
公开/授权文献
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