发明授权
US4719603A Semiconductor memory having a dynamic level detecting means for
detecting a level of a word line
失效
具有动态电平检测装置的半导体存储器,用于检测字线的电平
- 专利标题: Semiconductor memory having a dynamic level detecting means for detecting a level of a word line
- 专利标题(中): 具有动态电平检测装置的半导体存储器,用于检测字线的电平
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申请号: US852316申请日: 1986-04-15
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公开(公告)号: US4719603A公开(公告)日: 1988-01-12
- 发明人: Yutaka Shinagawa , Shigeru Shimada
- 申请人: Yutaka Shinagawa , Shigeru Shimada
- 申请人地址: JPX Tokyo JPX Tokyo
- 专利权人: Hitachi, Ltd.,Hitachi Microcomputer
- 当前专利权人: Hitachi, Ltd.,Hitachi Microcomputer
- 当前专利权人地址: JPX Tokyo JPX Tokyo
- 优先权: JPX60-78364 19850415
- 主分类号: G11C17/12
- IPC分类号: G11C17/12 ; G11C8/08 ; G11C11/407 ; G11C17/18 ; G11C7/00 ; G11C11/24
摘要:
A semiconductor memory includes a word line driving circuit whose output terminal is coupled to one end of each word line of a memory array, and also an auxiliary driving circuit which drives the other end of the word line upon receiving a selection signal transmitted to the other end of this word line. The auxiliary driving circuit comprises a level detector circuit which is dynamically driven by a timing signal, and a driving element which is driven by an output of the level detector circuit to drive the other end of the word line. When the word line is to be reset, the output of the level detector circuit is set at a level which brings the driving element into an "off" state. The auxiliary driving circuit of this arrangement permits the other end of the word line to change to a selection level quickly and to be reset quickly.
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