Invention Grant
- Patent Title: Counter circuit
- Patent Title (中): 计数器电路
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Application No.: US840820Application Date: 1986-03-18
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Publication No.: US4723258APublication Date: 1988-02-02
- Inventor: Hideo Tanaka , Ichiro Kuroda
- Applicant: Hideo Tanaka , Ichiro Kuroda
- Applicant Address: JPX Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JPX Tokyo
- Priority: JPX60-53659 19850318
- Main IPC: G06F7/507
- IPC: G06F7/507 ; G06F7/508 ; G06F7/62 ; G06F9/32 ; G06F9/34 ; G06F17/14 ; H03K23/00 ; H03K21/02 ; H03K23/58 ; H03K23/62
Abstract:
A multi-digit counter circuit performs both successive data production function and non-successive data production. Successive data is produced by an increment or decrement operation according to a first carry (borrow) signal. Non-successive data is produced by a control circuit which applies a second carry (borrow) signal independently of the first carry (borrow) signal to an arbitrary selected digit or digits. The arbitrary digit is designated according to the distance between the preceding data and the following data to be produced.
Public/Granted literature
- US5867508A Method and device for the correction of errors in the transmission of series of information items Public/Granted day:1999-02-02
Information query
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