发明授权
- 专利标题： Apparatus for reducing power consumed by a static microprocessor
- 专利标题（中）： 用于降低静态微处理器消耗功率的装置
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申请号： US65293申请日： 1979-08-09
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公开(公告)号： US4748559A公开(公告)日： 1988-05-31
- 发明人: Philip S. Smith , Kuppuswamy Raghunathan
- 申请人： Philip S. Smith , Kuppuswamy Raghunathan
- 申请人地址： IL Schaumburg
- 专利权人： Motorola, Inc.
- 当前专利权人： Motorola, Inc.
- 当前专利权人地址： IL Schaumburg
- 主分类号： G06F1/32
- IPC分类号： G06F1/32 ; G06F1/04
摘要：
In response to a software instruction, a static microprocessor is placed in a low current mode by disabling clock pulse generation. Means are provided for disabling a master oscillator when a STOP instruction is decoded. Additional means are provided for inhibiting clock pulses when a WAIT instruction is decoded without disabling the master oscillator. Clock pulse generation is again enabled upon receipt of a reset or interrupt signal.
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