发明授权
US4811299A Dynamic RAM device having a separate test mode capability 失效
具有单独测试模式能力的动态RAM设备

Dynamic RAM device having a separate test mode capability
摘要:
Disclosed is a dynamic RAM device capable of initiating and cancelling the test mode in response to the combinations of the row address and column address strobe signals with the write enable signal, which combinations are left unused in the normal operating mode, instead of increasing the number of external control signals.
公开/授权文献
信息查询
0/0