发明授权
- 专利标题: Logic circuit having individually testable logic modules
- 专利标题(中): 逻辑电路具有可单独测试的逻辑模块
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申请号: US57078申请日: 1987-06-02
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公开(公告)号: US4860290A公开(公告)日: 1989-08-22
- 发明人: Martin D. Daniels , Derek Roskell
- 申请人: Martin D. Daniels , Derek Roskell
- 申请人地址: TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: TX Dallas
- 主分类号: G01R31/28
- IPC分类号: G01R31/28 ; G01R31/3185 ; G06F11/22 ; G06F11/26 ; G06F11/36
摘要:
A modular logic circuit is disclosed, where each of the modules may be selected for testing by means of a scan path within the module made up of serial register latches (SRLs), each SRL being connected to predetermined nodes in the module functional circuitry. Each of the modules has a test port, which is independent from the system bus interconnections in the logic circuit, and which has an SRL for receiving serial data for selection of the scan path within the module. Responsive to the logic state stored in a module's selection SRL, the scan path within the module will either be enabled or disabled. After selection of a module or modules for testing, serial data is scanned into the SRLs in the scan path for setting the associated predetermined functional circuitry nodes; after exercise of the functional circuitry, the SRLs in the scan path store the results of the exercise at the predetermined nodes. An additional SRL is contained within each test port, and in the scan path, for storing a logic state corresponding to whether the functional circuitry in the module is to be connected to or disconnected from the system bus during the test sequence. A configuration if further disclosed which has global SRLs in the modules; such global SRLs are always in the scan path, regardless of whether or not the module containing them is selected. Multiplexing of the scan data and the configuration data is also disclosed.
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