An integrated current-mirror arrangement comprises a first and a second transistor whose bases are interconnected and connected to the collector of the first transistor. The transistors are constructed as vertical transistors each having a collector region (23a, 23b) of the first conductivity type, isolated from the substrate (21) of the first conductivity type by an intermediate layer (22) of the second conductivity type. A connection is provided between said intermediate layer (22) and the interconnected bases (29, 30) of the two transistors which improves the high-frequency transfer function between input and output and effectively eliminates the capacitive path for interference signals from the voltage supply line (+V) to the output.