In order that one clock signal generator in a digital video signal processing circuit comprising a line-coupled clock signal generator and using, for example one or more field memories is sufficient for writing and reading these memories and can still process a signal from a video recorder, the control loop of the clock signal generator uses a comb filter circuit which rapidly corrects regular variations in an output signal of a phase detector of the control loop, which variations are caused by the head drum of the video recorder, without having to adapt the proportioning of a conventional loop filter circuit.