发明授权
US4935790A EEPROM memory cell with a single level of polysilicon programmable and
erasable bit by bit
失效
EEPROM存储单元具有单级多晶硅可编程和可擦除位
- 专利标题： EEPROM memory cell with a single level of polysilicon programmable and erasable bit by bit
- 专利标题（中）： EEPROM存储单元具有单级多晶硅可编程和可擦除位
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申请号： US136652申请日： 1987-12-22
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公开(公告)号： US4935790A公开(公告)日： 1990-06-19
- 发明人: Paolo G. Cappelletti , Giuseppe Corda , Carlo Riva
- 申请人： Paolo G. Cappelletti , Giuseppe Corda , Carlo Riva
- 申请人地址： ITX Catania
- 专利权人： SGS Microelettronica S.p.A.
- 当前专利权人： SGS Microelettronica S.p.A.
- 当前专利权人地址： ITX Catania
- 优先权： ITX22800A/86 19861222
- 主分类号： H01L21/8247
- IPC分类号： H01L21/8247 ; H01L27/115 ; H01L29/788 ; H01L29/792
摘要：
The cell is formed of a selection transistor, a detection transistor and a tunnel condenser. The detection Transistor has its own control gate formed with an n.sup.+ diffusion which is closed and isolated from those of the other cells of the same memory.
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