A field effect transistor is formed as a first semiconductor element on a main surface of a first semiconductor layer (1). An interlayer insulating film (10) constituted by a first insulating layer (101) and a second insulating layer (102) is formed on the first semiconductor element. The first insulating layer (101) is formed of a BPSG film having a glass transition point no higher than 750.degree. C. The second insulating layer (102) is formed of a silicon oxide film having a glass transition point higher than 750.degree. C. and a thickness no less than 2000 .ANG. and no more than 1 .mu.m formed on the first insulating layer (101). A second semiconductor layer (11) is formed on the second insulating layer (102) of the interlayer insulating film (10). The second semiconductor layer (11) is formed to be an island, with the peripheral portions isolated. A field effect transistor as a second semiconductor element is formed in the second semiconductor layer (11). The first insulating layer (101) suppresses stress remained in the second semiconductor layer (11) derived from a difference between coefficient of thermal expansion of the second semiconductor layer (11) and the interlayer insulating film (10). The second insulating layer (102) suppresses lateral distortion generated in the semiconductor layer (11). The characteristics of the second semiconductor element can be improved.