发明授权
- 专利标题： Semiconductor memory having stacked capacitor
- 专利标题（中）： 半导体存储器具有层叠电容
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申请号： US566315申请日： 1990-08-13
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公开(公告)号： US5012310A公开(公告)日： 1991-04-30
- 发明人: Shinichiro Kimura , Yoshifumi Kawamoto , Toru Kaga , Hideo Sunami
- 申请人： Shinichiro Kimura , Yoshifumi Kawamoto , Toru Kaga , Hideo Sunami
- 申请人地址： JPX Tokyo
- 专利权人： Hitachi, Ltd.
- 当前专利权人： Hitachi, Ltd.
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX62-24529 19870206
- 主分类号： H01L27/10
- IPC分类号： H01L27/10 ; H01L21/8242 ; H01L27/108
摘要：
A megabit dynamic random access memory realizing high integration and high reliability is disclosed. The need for an allowance for photomask alignment which is carried out to produce a stacked capacitor memory cell is eliminated. The plate electrode of each memory cell is isolated from the corresponding data line in a memory array by means of an insulating film which is self-alignedly provided around the plate electrode.
公开/授权文献
- USD282386S Treadmill 公开/授权日：1986-01-28
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