发明授权
- 专利标题: Output circuit having high charge to voltage conversion gain
- 专利标题(中): 具有高电荷到电压转换增益的输出电路
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申请号: US502688申请日: 1990-04-02
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公开(公告)号: US5029190A公开(公告)日: 1991-07-02
- 发明人: Tadakuni Narabu , Masaharu Hamasaki , Tetsuya Iizuka
- 申请人: Tadakuni Narabu , Masaharu Hamasaki , Tetsuya Iizuka
- 申请人地址: JPX Tokyo
- 专利权人: Sony Corporaiton
- 当前专利权人: Sony Corporaiton
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX1-83689 19890331
- 主分类号: H01L29/762
- IPC分类号: H01L29/762 ; G11C19/28 ; H01L21/339 ; H01L27/148
摘要:
An output circuit for CCD imager devices or CCD delay devices is disclosed in which a depletion type second MIS transistor is connected to the drain side of a first MIS transistor constituting a source follower adapted for converting transferred signal signals into an electrical voltage, and an output voltage is supplied to the gate of the second MIS transistor. This depletion type second MIS transistor causes the drain potential of the first MIS transistor to be changed in phase with the input electrical charges to reduce the gate-to-drain capacitance of the first MIS transistor to improve the charge-to-voltage conversion gain.
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