发明授权
- 专利标题: Semiconductor device and method of producing same
- 专利标题(中): 半导体器件及其制造方法
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申请号: US357809申请日: 1989-05-30
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公开(公告)号: US5057896A公开(公告)日: 1991-10-15
- 发明人: Hiroshi Gotou
- 申请人: Hiroshi Gotou
- 申请人地址: JPX Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX63-129463 19880528
- 主分类号: H01L23/522
- IPC分类号: H01L23/522 ; H01L21/28 ; H01L21/60 ; H01L21/768 ; H01L21/8242 ; H01L21/8246 ; H01L23/485 ; H01L27/10 ; H01L27/108 ; H01L29/78
摘要:
A semiconductor device comprises a semiconductor substrate having a pillar-like portion projecting upwardly from the main surface thereof and defining circumferential side walls and a top surface, a first insulating layer covering the circumferential side walls and the upper, major surface of the substrate including the juncture therebetween. A first conductor is formed in surrounding relationship relatively to the pillar-like portion and includes integral base and upper portions extending from the juncture and upwardly to an upper edge thereof, at an intermediate position of the height of the side wall surfaces, and the base portion extending outwardly from the juncture to an outer, base edge. A second insulating layer is formed on the exposed surface of the first conductor and has upper and lower edges connected to the first insulating layer and a third insulating layer is formed on the exposed surfaces of the second insulating layer and the remaining, exposed portions of the first insulating layer and has an exposed, upper surface substantially coplanar with the flat, top surface of the pillar-like portion. A second, elongated conductor is formed on and extends along the exposed surface of the third insulating layer and includes a portion aligned with and electrically connected to the top, flat surface of the pillar-like portion.
公开/授权文献
- US4464629A Hall element device 公开/授权日:1984-08-07