Invention Grant
US5109492A Microprocessor which terminates bus cycle when access address falls
within a predetermined processor system address space
失效
当访问地址落在预定的处理器系统地址空间内时终止总线周期的微处理器
- Patent Title: Microprocessor which terminates bus cycle when access address falls within a predetermined processor system address space
- Patent Title (中): 当访问地址落在预定的处理器系统地址空间内时终止总线周期的微处理器
-
Application No.: US84808Application Date: 1987-08-13
-
Publication No.: US5109492APublication Date: 1992-04-28
- Inventor: Kouki Noguchi , Yoshimune Hagiwara , Kazuhiko Iwasaki , Hirokazu Aoki , Shigeru Shimada
- Applicant: Kouki Noguchi , Yoshimune Hagiwara , Kazuhiko Iwasaki , Hirokazu Aoki , Shigeru Shimada
- Applicant Address: JPX Tokyo
- Assignee: Hitachi, Ltd.
- Current Assignee: Hitachi, Ltd.
- Current Assignee Address: JPX Tokyo
- Priority: JPX61-219561 19860919; JPX61-223516 19860924
- Main IPC: G06F13/36
- IPC: G06F13/36 ; G06F13/42
Abstract:
A microprocessor suitable for a high speed processor system prevents extension of a bus cycle due to delay of generation of a bus cycle end signal and effectively utilizes a characteristic of a high speed accessable external device.
Public/Granted literature
- US6074316A Split sprocket device Public/Granted day:2000-06-13
Information query
