发明授权
US5122763A Frequency snythesizer for implementing generator of highly pure signals
and circuit devices, such as VCQ, BLL and SG, used therein
失效
用于实施高纯度信号和电路设备的发生器的频率SNYTHESIZER,如VCQ,BLL和SG,使用它们
- 专利标题: Frequency snythesizer for implementing generator of highly pure signals and circuit devices, such as VCQ, BLL and SG, used therein
- 专利标题(中): 用于实施高纯度信号和电路设备的发生器的频率SNYTHESIZER,如VCQ,BLL和SG,使用它们
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申请号: US570048申请日: 1990-08-20
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公开(公告)号: US5122763A公开(公告)日: 1992-06-16
- 发明人: Hiroshi Saeki , Hatsuo Motoyama
- 申请人: Hiroshi Saeki , Hatsuo Motoyama
- 申请人地址: JPX Tokyo
- 专利权人: Anritsu Corporation
- 当前专利权人: Anritsu Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX1-217261 19890825; JPX1-243434 19890921; JPX1-246532 19890925; JPX2-83049 19900330
- 主分类号: H03B1/00
- IPC分类号: H03B1/00 ; H03B5/12 ; H03B19/16 ; H03B19/20 ; H03B21/01 ; H03L7/093 ; H03L7/113
摘要:
A frequency synthesizer includes a control section; a first signal generator responsive to the control section for selectively outputting one of frequency signals whose frequencies are represented by Fp=a.times..vertline.P.vertline..times..DELTA.F (where the coefficient a is a positive odd number and the coefficient p is an integer); and a second signal generator responsive to the control section for selectively outputting one of frequencies whose frequencies are represented by Fq=b.times..vertline.Q.vertline..times..DELTA.F (where the coefficient b is a positive integer exclusive of integral multiples of prime factors into which a is resolved, and the coefficient Q is an integer and satisfying the expression: .vertline.Q.vertline..ltoreq.(a-1)/2. A mixer mixes a frequency signal Fp from the first signal generator and a frequency signal Fq from the second signal generator; and a frequency selecting circuit selects either of frequency signals .vertline.FP-Fq.vertline. or Fp+Fq output from the mixer. The control section determines the values of P and Q satisfying the following expresion P=T+(S-b.times.Q)/a on the basis of a desired frequency signal Fi=m.times..DELTA.F, a coefficient m=0, 1, 2, ..n set in predetermined frequency .DELTA.F; and quotient T and remainder s of m/a to cause each of the first and second signal generators to output a predetermined frequency and the frequency selecting circuit to select one of the frequency signals .vertline.Fp-Fq.vertline. and Fp+Fq that corresponds to the frequency signal Fi.
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