FAST PULSE GENERATOR
    1.
    发明申请
    FAST PULSE GENERATOR 有权
    快速脉冲发生器

    公开(公告)号:US20150288332A1

    公开(公告)日:2015-10-08

    申请号:US14610477

    申请日:2015-01-30

    IPC分类号: H03B19/16

    CPC分类号: H03B19/16

    摘要: A pulse generator is disclosed. The pulse generator can include a pulsed switch, such as a diode. The pulsed switched can be connected between an input source, such as an oscillator and a frequency multiplier.

    摘要翻译: 公开了一种脉冲发生器。 脉冲发生器可以包括诸如二极管的脉冲开关。 脉冲开关可连接在诸如振荡器和倍频器之类的输入源之间。

    Plural transformers with elongated cores
    2.
    发明授权
    Plural transformers with elongated cores 失效
    具有细长芯的多个变压器

    公开(公告)号:US5390349A

    公开(公告)日:1995-02-14

    申请号:US935549

    申请日:1992-08-26

    CPC分类号: H01F27/027 H01F19/04

    摘要: A manner of using a plurality of transformers having cylindrical cores such that operation of the transformers at high frequencies allows the cores of the transformers to be disposed parallel to each other and in relatively close proximity without substantial interference.

    摘要翻译: 使用具有圆柱形磁芯的多个变压器的方式,使得变压器在高频下的操作允许变压器的磁芯彼此平行设置并且相对接近而没有实质的干扰。

    PLL with lock detector for detecting a specified signal in a plurality
of input signals
    4.
    发明授权
    PLL with lock detector for detecting a specified signal in a plurality of input signals 失效
    用于检测大量输入信号中指定信号的锁定检测器

    公开(公告)号:US5111161A

    公开(公告)日:1992-05-05

    申请号:US669981

    申请日:1991-03-15

    申请人: Toshiyuki Sato

    发明人: Toshiyuki Sato

    摘要: A designated burst signal specified in a designated frequency is detected from an all-inclusive signal specified in a plurality of frequencies, by multiplying a frequency of the all-inclusive signal by a multiplying factor so as to produce a multiplied output signal, performing a phase-lock loop operation between the multiplied output signal and an oscillated signal produced for performing the phase-lock loop operation and specified in a multiplied frequency of the designated frequency by the multiplying factor, so as to produce a phase-lock output signal and comparing the multiplied output signal and the phase-lock output signal for producing a detected output signal representing whether the designated burst signal is in the all-inclusive signal.

    Frequency multipliers
    6.
    发明授权
    Frequency multipliers 失效
    频率乘法器

    公开(公告)号:US4400630A

    公开(公告)日:1983-08-23

    申请号:US214026

    申请日:1980-12-08

    申请人: David P. Owen

    发明人: David P. Owen

    IPC分类号: H03B19/16 H03B19/00

    CPC分类号: H03B19/16

    摘要: A frequency multiplier uses a pair of Schottky diodes to rectify an applied signal, with the rectified waveforms provided by both diodes being combined to produce an output signal having a predominant frequency of twice the applied frequency. In order to prevent distortion occuring at low signal levels, a d.c. bias is applied to the diodes so as to bias them at their threshold values. The effect of temperature variations on the diodes is minimized by using a further diode to determine the effective value of the bias voltage.

    摘要翻译: 倍频器使用一对肖特基二极管来整流施加的信号,由两个二极管提供的整流波形被组合以产生具有施加频率的两倍的主要频率的输出信号。 为了防止在低信号电平下发生失真, 将二极管施加偏压以将其偏置在其阈值。 通过使用另外的二极管来确定偏置电压的有效值,使二极管的温度变化的影响最小化。

    Switched tuneable frequency multiplier
    7.
    发明授权
    Switched tuneable frequency multiplier 失效
    开关可调倍频器

    公开(公告)号:US4342008A

    公开(公告)日:1982-07-27

    申请号:US229473

    申请日:1981-01-29

    申请人: Robert E. Jewett

    发明人: Robert E. Jewett

    摘要: A broadband high frequency signal generator is disclosed having a low and a high frequency swept signal source connected to a YIG tuned frequency multiplier. One end of an output coupling loop for the YIG is connected to ground through a PIN diode, and the low frequency signal source is connected to the junction of the output coupling loop and the PIN diode. When the PIN diode is caused to conduct, signals from the high frequency source are passed through the YIG tuned multiplier to an output in the conventional manner. When the PIN diode is not conducting, signals from the low frequency source are passed to the output through the output coupling loop.

    摘要翻译: 公开了一种宽带高频信号发生器,其具有连接到YIG调谐倍频器的低频和高频扫频信号源。 用于YIG的输出耦合回路的一端通过PIN二极管连接到地,低频信号源连接到输出耦合回路和PIN二极管的结。 当PIN二极管导通时,来自高频源的信号以常规方式通过YIG调谐倍增器输出到输出端。 当PIN二极管不导通时,来自低频源的信号通过输出耦合回路传递到输出端。

    Frequency doubler circuit
    8.
    发明授权
    Frequency doubler circuit 失效
    频率双重电路

    公开(公告)号:US3710146A

    公开(公告)日:1973-01-09

    申请号:US3710146D

    申请日:1971-07-07

    申请人: SONY CORP

    发明人: OHSAWA M

    摘要: A frequency doubler circuit including a differential amplifier supplied with a signal of a predetermined frequency, for example, a pilot signal of 19KHz contained in an FM stereophonic signal, a pair of rectifier circuits coupled to outputs of the differential amplifier to rectify the signal of the predetermined frequency and a combining circuit to combine the rectified signals, whereby a signal of a frequency twice that of the signal supplied to the differential amplifier is derived at the output terminal of the combining circuit.

    摘要翻译: 一种倍频器电路,包括:提供有预定频率的信号的差分放大器,例如包含在FM立体声信号中的19KHz的导频信号;一对整流电路,耦合到差分放大器的输出端,以对信号进行校正 预定频率和组合电路组合整流信号,由此在组合电路的输出端导出提供给差分放大器的信号频率的两倍的信号。