发明授权
- 专利标题: Fabricating an electrically-erasable, electrically-programmable read-only memory having a tunnel window insulator and thick oxide isolation between wordlines
- 专利标题(中): 制造具有隧道窗绝缘体和字线之间的厚氧化物隔离的电可擦除的电可编程只读存储器
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申请号: US648087申请日: 1991-01-31
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公开(公告)号: US5156991A公开(公告)日: 1992-10-20
- 发明人: Manzur Gill , Sebastiano D'Arrigo , Sung-Wei Lin
- 申请人: Manzur Gill , Sebastiano D'Arrigo , Sung-Wei Lin
- 申请人地址: TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: TX Dallas
- 主分类号: H01L27/115
- IPC分类号: H01L27/115 ; H01L29/788
摘要:
An electrically-erasable, programmable ROM cell, or an EEPROM cell, is constructed using an enhancement transistor merged with a floating-gate transistor, where the floating-gate transistor has a small tunnel window, in a contact-free cell layout, enhancing the ease of manufacture and reducing cell size. The bitlines and source/drain regions are buried beneath relatively thick silicon oxide, which allows a favorable ratio of control gate to floating gate capacitance. Programming and erasing are provided by the tunnel window are near or above the channel side of the source. The window has a thinner dielectric than the remainder of the floating gate, to allow Fowler-Nordheim tunneling. By using dedicated drain or ground lines, rather than a virtual-ground layout, and by using thick oxide for isolation between bitlines, the floating gate can extend onto adjacent bitlines and isolation area, resulting in a favorable coupling ratio. Isolation between wordlines is also by thick thermal oxide in a preferred embodiment, further improving the coupling ratio. Bitline and wordline spacing may be selected for optimum pitch or aspect ratio. Bitline to substrate capacitance is minimized.
公开/授权文献
- US4634304A Printer 公开/授权日:1987-01-06
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