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US5158901A Field effect transistor having control and current electrodes positioned at a planar elevated surface and method of formation 失效
场效应晶体管具有位于平面升高表面处的控制和电流电极以及形成方法

Field effect transistor having control and current electrodes positioned
at a planar elevated surface and method of formation
摘要:
A field effect transistor having regions (20, 20', and 20") which respectively function as a planar elevated surface for gate, drain, and source electrical contact, and method of fabrication. The transistor overlies a substrate (12) and is formed partially from active areas (14 and 14'). The regions (20, 20', and 20"), each underlie or are surrounded by a dielectric layer (22). A gate is formed by a gate layer (24). A source (30) is formed within region (20") and is electrically connected to active area (14'). A drain (30') and channel region are formed within region (20'). Electrical contact is made to the source (30), drain (30') and gate layer (24) by conductive layers (34", 34', and 34, respectively).
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