发明授权
- 专利标题: Method of manufacturing a thin film transistor
- 专利标题(中): 制造薄膜晶体管的方法
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申请号: US503269申请日: 1990-04-02
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公开(公告)号: US5166085A公开(公告)日: 1992-11-24
- 发明人: Haruo Wakai , Nobuyuki Yamamura , Syunichi Sato , Minoru Kanbara
- 申请人: Haruo Wakai , Nobuyuki Yamamura , Syunichi Sato , Minoru Kanbara
- 申请人地址: JPX Tokyo
- 专利权人: Casio Computer Co., Ltd.
- 当前专利权人: Casio Computer Co., Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX62-225819 19870909; JPX62-241607 19870925; JPX62-248878 19871001
- 主分类号: G02F1/1333
- IPC分类号: G02F1/1333 ; G02F1/1362 ; G02F1/1368 ; H01L27/12 ; H01L29/786
摘要:
First, a gate metal layer, a gate insulating film, a semiconductor layer, an n-type semiconductor layer, and an ohmic metal layer formed on a substrate in the order mentioned. Then, the film and the layers are patterned into those having the same shape and size. Next, a source metal layer and a drain metal layer are formed on the ohmic metal layer. Further, a portion of the ohmic metal layer, a portion of said source metal layer, and a portion of said drain metal layer are etched, thereby forming a channel portion. Finally, a transparent electrode is formed on the source metal layer, thus manufacturing a TFT. Since the film and the layer, the major components of the TFT, are sequentially formed, and are patterned simultaneously, the TFT can be manufacture with high yield. Further, since the transparent electrode is formed on the uppermost layer, i.e., the source metal layer, the pixel has a great opening ratio.
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