发明授权
- 专利标题: Synchronizing system
- 专利标题(中): 同步系统
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申请号: US614875申请日: 1990-11-16
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公开(公告)号: US5200976A公开(公告)日: 1993-04-06
- 发明人: Yukihito Ishihara , Yasuyuki Kozima , Atsushi Mizuno
- 申请人: Yukihito Ishihara , Yasuyuki Kozima , Atsushi Mizuno
- 申请人地址: JPX Tokyo JPX Tokyo
- 专利权人: Hitachi Ltd.,Hitachi Denshi Kabushiki Kaisha
- 当前专利权人: Hitachi Ltd.,Hitachi Denshi Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo JPX Tokyo
- 优先权: JPX1-305297 19891125
- 主分类号: H04L27/18
- IPC分类号: H04L27/18 ; H04L7/033 ; H04L7/04 ; H04L7/10
摘要:
In a synchronizing circuit, such as a DPLL (Digital Phase-Locked Loop), adapted to be synchronized in accordance with clock signals of an external clock, a programmable timer in the circuit is forcedly reset in synchronism with the edge of an external clock signal pulse at the time of the clock signal's initial state in accordance with a clock detection circuit. Subsequently, baud timing of the external clock signals is detected by making use of internal clock signals produced by the circuit. Synchronism is thus established and maintained between the circuit and the external device.
公开/授权文献
- US4099881A Viewer for biological diffusion plate 公开/授权日:1978-07-11
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