发明授权
- 专利标题: Substrate bias voltage generator circuit
- 专利标题(中): 基板偏压发生电路
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申请号: US865258申请日: 1992-04-08
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公开(公告)号: US5243228A公开(公告)日: 1993-09-07
- 发明人: Keiji Maruyama , Naokazu Miyawaki
- 申请人: Keiji Maruyama , Naokazu Miyawaki
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX3-75156 19910408
- 主分类号: H01L27/04
- IPC分类号: H01L27/04 ; G05F3/20 ; G11C11/408 ; H01L21/822
摘要:
A substrate bias voltage generator circuit has a substrate bias voltage detector circuit, a substrate bias driver circuit, and a charge pump circuit. the substrate bias voltage detector circuit detects a substrate bias voltage applied to a semiconductor substrate and outputs a substrate bias voltage detection signal. The substrate bias detector circuit includes a P-channel transistor with a gate terminal and an N-channel transistor with a substrate terminal, both terminals being connected to the semiconductor substrate and the substrate bias voltage which is a back bias for the N-channel transistor. The substrate bias driver circuit is responsive to the substrate bias voltage detection signal outputted from the substrate bias voltage detector circuit, and outputs a drive signal when the absolute value of the substrate bias voltage is equal to or smaller than a predetermined value, and stops outputting the drive signal when the absolute value of the substrate bias voltage is larger than the predetermined value. The charge pump circuit is responsive to the drive signal from the substrate bias driver circuit, and generates the substrate bias voltage.
公开/授权文献
- US5876879A Oxide layer patterned by vapor phase etching 公开/授权日:1999-03-02
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