发明授权
US5260233A Semiconductor device and wafer structure having a planar buried
interconnect by wafer bonding
失效
半导体器件和晶片结构通过晶片接合具有平面埋入互连
- 专利标题: Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding
- 专利标题(中): 半导体器件和晶片结构通过晶片接合具有平面埋入互连
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申请号: US973131申请日: 1992-11-06
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公开(公告)号: US5260233A公开(公告)日: 1993-11-09
- 发明人: Taqi N. Buti , Louis L-C. Hsu , Rajiv V. Joshi , Joseph F. Shepard
- 申请人: Taqi N. Buti , Louis L-C. Hsu , Rajiv V. Joshi , Joseph F. Shepard
- 申请人地址: NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: NY Armonk
- 主分类号: H01L21/3205
- IPC分类号: H01L21/3205 ; H01L21/74 ; H01L21/762 ; H01L21/768 ; H01L21/822 ; H01L21/98 ; H01L23/522 ; H01L27/04 ; H01L21/76
摘要:
A wafer structure suitable for the formation of semiconductor devices thereon and having a buried interconnect structure for interconnection of desired ones of the semiconductor devices according to a predetermined interconnection pattern and a method of making the same is disclosed. The wafer structure comprises a primary substrate having a first thickness appropriate for the formation of the desired semiconductor devices. The primary substrate further comprises a) conductive interconnection pads of a second thickness formed on a bottom surface of the primary substrate according to the predetermined interconnection pattern, b) first isolation pads of a third thickness formed on the bottom surface of the primary substrate between the conductive interconnection pads, and c) interconnection pad caps of a fourth thickness formed upon the surface of the interconnection pads opposite from the primary substrate, wherein the interconnection pad caps comprise a material suitable for wafer bonding, and further wherein the total thickness of the second thickness and the fourth thickness equals the third thickness. The structure further comprises a secondary substrate having an oxide layer thereon bonded to the interconnection pad caps and the first isolation pads of the primary wafer.
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