发明授权
US5298802A Semiconductor integrated circuit device with a plurality of logic
circuits having active pull-down functions
失效
具有多个具有主动下拉功能的逻辑电路的半导体集成电路器件
- 专利标题: Semiconductor integrated circuit device with a plurality of logic circuits having active pull-down functions
- 专利标题(中): 具有多个具有主动下拉功能的逻辑电路的半导体集成电路器件
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申请号: US56798申请日: 1993-05-03
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公开(公告)号: US5298802A公开(公告)日: 1994-03-29
- 发明人: Mitsuo Usami , Noboru Shiozawa , Toshio Yamada , Hiromasa Katoh , Kazuyoshi Satoh , Tohru Kobayashi , Tatsuya Kimura , Masato Hamamoto , Atsushi Shimizu , Kaoru Koyu
- 申请人: Mitsuo Usami , Noboru Shiozawa , Toshio Yamada , Hiromasa Katoh , Kazuyoshi Satoh , Tohru Kobayashi , Tatsuya Kimura , Masato Hamamoto , Atsushi Shimizu , Kaoru Koyu
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX63-81645 19880402; JPX63-89622 19880412; JPX63-274170 19881028; JPX1-192005 19890725
- 主分类号: H03K3/2885
- IPC分类号: H03K3/2885 ; H03K17/0412 ; H03K17/66 ; H03K19/013 ; H03K19/086
摘要:
In accordance with one aspect of the invention, a semiconductor integrated circuit is provided wherein an input circuit is formed by a phase split circuit having a bipolar transistor which outputs an inverted output from the collector and a non-inverted output from the emitter. The emitter follower output circuit is driven by an inverted output of the phase split circuit. Meanwhile, an emitter load of the emitter follower output circuit is formed by a transistor, and the emitter load transistor is temporarily driven conductively by a charging current of the capacitance to be charged by the rising edge of the non-inverted output of the phase split circuit. As a second aspect of the invention, a logic circuit is formed of a logic portion and an output portion. The output portion includes an emitter follower output transistor receiving an output signal generated by the logic portion and an active pull-down transistor receiving at its base a signal supplied thereto through a capacitance element. The signal received by the active pull-down transistor has a phase reverse to that of the input signal supplied to the base of said output transistor. Between the base and emitter of the active pull-down transistor, there is disposed a bias circuit formed of a transistor receiving at its base a predetermined bias voltage and an emitter resistor. Further, between a junction point of the emitter follower output transistor and the active pull-down transistor and the emitter of the transistor as a constituent of the bias circuit, there is disposed a capacitance element for feeding back the output signal.
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