发明授权
- 专利标题: Semiconductor integrated circuit device including memory cells having a structure effective in suppression of leak current
- 专利标题(中): 包括具有抑制漏电流的结构的存储单元的半导体集成电路器件
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申请号: US875653申请日: 1992-04-29
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公开(公告)号: US5349218A公开(公告)日: 1994-09-20
- 发明人: Yoshitaka Tadaki , Toshihiro Sekiguchi , Hiroyuki Uchiyama , Toru Kaga , Jun Murata , Osaomi Enomoto
- 申请人: Yoshitaka Tadaki , Toshihiro Sekiguchi , Hiroyuki Uchiyama , Toru Kaga , Jun Murata , Osaomi Enomoto
- 申请人地址: JPX Tokyo JPX Tokyo
- 专利权人: Hitachi, Ltd.,Texas Instruments Japan, Inc.
- 当前专利权人: Hitachi, Ltd.,Texas Instruments Japan, Inc.
- 当前专利权人地址: JPX Tokyo JPX Tokyo
- 优先权: JPX3-098868 19910430
- 主分类号: H01L27/04
- IPC分类号: H01L27/04 ; H01L21/822 ; H01L21/8242 ; H01L27/10 ; H01L27/108 ; H01L29/78
摘要:
A semiconductor integrated circuit device has a semiconductor memory cell array including word lines, data lines and a plurality of memory cells provided at cross points of the word and data lines. Each memory cell has a cell selection transistor and an information storage capacitor connected in series. The cell selection transistor in one cell includes first and second doped regions formed in a main surface of a semiconductor substrate, a first insulating film formed on the main surface between the first and second doped regions and a control electrode layer formed on the first insulating film between the first and second doped regions. The first doped region is connected with a data line, while the control electrode is connected with a word line. The information storage capacitor includes a second insulating film formed on the wall of one trench formed on the main surface of the substrate, an electrode layer formed on the second insulating film and serving as a first electrode of the capacitor, a dielectric film formed on the electrode layer and a conducting material provided to fill a space defined by the dielectric film in the trench and serving as a second electrode of the capacitor. The second doped region of the transistor terminates at the wall of the trench. A conducting layer is provided to extend both on the second doped region and the conducting material in the cell to electrically interconnect them for the series connection.
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