Invention Grant
US5382534A Field effect transistor with recessed buried source and drain regions
失效
具有埋入式源极和漏极区域的场效应晶体管
- Patent Title: Field effect transistor with recessed buried source and drain regions
- Patent Title (中): 具有埋入式源极和漏极区域的场效应晶体管
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Application No.: US254534Application Date: 1994-06-06
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Publication No.: US5382534APublication Date: 1995-01-17
- Inventor: Shing-Ren Sheu , Kuan-Cheng Su , Chen-Hui Chung
- Applicant: Shing-Ren Sheu , Kuan-Cheng Su , Chen-Hui Chung
- Applicant Address: TWX Hsinchu
- Assignee: United Microelectronics Corporation
- Current Assignee: United Microelectronics Corporation
- Current Assignee Address: TWX Hsinchu
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/08 ; H01L29/10 ; H01L21/265
Abstract:
The invention describes recessed buried conductive regions formed in a trench in the substrate that provides a smooth surface topology, smaller devices and improved device performance. The buried regions have two conductive regions, the first on the trench sidewalls, the second on the trench bottom. In addition, two buried layers are formed between adjacent buried conductive regions: a threshold voltage layer near the substrate surface and an anti-punchthrough layer formed at approximately the same depth as the conductive regions on the trench bottoms. The first conductive region and the anti-punchthrough layer have the effect of increasing the punchthru voltage without increasing the threshold voltage. The first and second regions also lowers the resistivity of the buried regions allowing use of smaller line pitches and therefore smaller devices. Overall, the recessed conductive regions and the two buried layers allow the formation of smaller devices with improved performance.
Public/Granted literature
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