发明授权
- 专利标题: Anti-noise and auto-stand-by memory architecture
- 专利标题(中): 抗噪声和自动备用内存架构
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申请号: US901862申请日: 1992-06-22
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公开(公告)号: US5404334A公开(公告)日: 1995-04-04
- 发明人: Luigi Pascucci , Marco Olivo
- 申请人: Luigi Pascucci , Marco Olivo
- 申请人地址: ITX Milan
- 专利权人: SGS-Thomson Microelectronics s.r.l.
- 当前专利权人: SGS-Thomson Microelectronics s.r.l.
- 当前专利权人地址: ITX Milan
- 优先权: ITXVA91A0022 19910731
- 主分类号: G11C11/417
- IPC分类号: G11C11/417 ; G11C7/10 ; G11C7/14 ; G11C7/22 ; G11C11/401 ; G11C11/407 ; G11C11/409 ; G11C11/413 ; G11C13/00
摘要:
Spurious memory readings which may be caused by noise induced by transitions in the output buffers of a fast parallel memory device are prevented by permitting output latches to change state in function of newly extracted data signals by means of an enabling pulse having a preestablished duration and which is generated only after a change of memory address signals has occurred and the new configuration of memory address signals has lasted for a time which is not shorter than the time of propagation of signals through the memory chain. The enabling pulse is generated by employing a detector of transitions occurring in the input circuitry of the memory, a dummy memory chain, a one-shot pulse generator and a resetting pulse generator. The anti-noise network may be exploited also for implementing an auto-stand-by condition at the end of each read cycle, which reduces power consumption and increases speed by simplifying the sensing process.
公开/授权文献
- US5901479A Bucket for a front-end loader 公开/授权日:1999-05-11
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