A multiplication circuit for multiplying analog values. The multiplication circuit receives a plurality of input voltages and selects one of the input voltages. The multiplication circuit also includes at least one resistor/capacitor (RC) circuit. The RC circuits includes a resistor for receiving a stepwise start signal and a capacitor, which is connected between a ground potential and the resistor. An output terminal is connected between the resistor and the capacitor. The output terminal outputs an output voltage. The multiplication circuit produces a stop signal when a difference between the selected one of the input voltages and the output voltage is greater than a predetermined value. The multiplication circuit selectively increases or decreases a count value by a number of clock pulses that occur between the stepwise start signal and the stop signal, The multiplication circuit produces a count signal, which is indicative of the count value. The multiplication circuit includes a switch for electrically disconnecting, in accordance with the count signal, the resistor and the capacitor of the RC circuit.