发明授权
- 专利标题: Multiplication circuit
- 专利标题(中): 乘法电路
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申请号: US242837申请日: 1994-05-16
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公开(公告)号: US5440605A公开(公告)日: 1995-08-08
- 发明人: Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
- 申请人: Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
- 申请人地址: JPX Tokyo
- 专利权人: Yozan Inc.
- 当前专利权人: Yozan Inc.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX5-139136 19930517
- 主分类号: G06J1/00
- IPC分类号: G06J1/00 ; G11C27/02 ; G06F7/44
摘要:
A multiplication circuit of minimized transfer error having a selector for inputting analog data to one of a plurality of sample hold circuits. The data input in the sample hold circuit is introduced to one of a plurality of multiplication circuits by a multiplexer with multi-input and -output. Data is not transferred between adjacent sample hold circuits.
公开/授权文献
- US4855296A Biocidal compositions and use thereof 公开/授权日:1989-08-08