Invention Grant
US5463395A Semi-flash type A/D converter employing a correction encoder for eliminating errors in the output signals due to noise, and a corresponding method therefor 失效
采用校正编码器的半闪光型A / D转换器,用于消除由噪声引起的输出信号中的误差及其相应的方法

  • Patent Title: Semi-flash type A/D converter employing a correction encoder for eliminating errors in the output signals due to noise, and a corresponding method therefor
  • Patent Title (中): 采用校正编码器的半闪光型A / D转换器,用于消除由噪声引起的输出信号中的误差及其相应的方法
  • Application No.: US127373
    Application Date: 1993-09-28
  • Publication No.: US5463395A
    Publication Date: 1995-10-31
  • Inventor: Yasunori Sawai
  • Applicant: Yasunori Sawai
  • Applicant Address: JPX Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JPX Tokyo
  • Priority: JPX4-282401 19920928
  • Main IPC: H03M1/08
  • IPC: H03M1/08 H03M1/14 H03M1/36 H03M1/68
Semi-flash type A/D converter employing a correction encoder for
eliminating errors in the output signals due to noise, and a
corresponding method therefor
Abstract:
A semi-flash type analog/digital converter for eliminating errors in its output signals which are caused by noise. The analog/digital converter includes a D/A converter for outputting a plurality of analog signals which are produced based on a plurality of input signals. A plurality of comparators compare the voltage of an analog input signal, provided via a sample and hold circuit, with the analog signals output from the D/A converter. The output from the comparators are supplied to two latches, which further provide the outputs to a plurality of encoders. One of the encoders encodes the signals provided by one of the latches and outputs signals representative of high order bits of a digital signal. A second encoder, which encodes output signals provided by the other latch, is a correction encoder. The correction encoder corrects the signals provided by the latch if it determines that any of the signals are in error, and outputs signals representing the lower order bits of a digital output signal. The correction encoder includes either a priority control circuit or an adder circuit which performs the correction.
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