发明授权
US5464998A Non-volatile semiconductor memory NAND structure with differently doped
channel stoppers
失效
具有不同掺杂通道阻塞的非易失性半导体存储器NAND结构
- 专利标题: Non-volatile semiconductor memory NAND structure with differently doped channel stoppers
- 专利标题(中): 具有不同掺杂通道阻塞的非易失性半导体存储器NAND结构
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申请号: US220590申请日: 1994-03-31
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公开(公告)号: US5464998A公开(公告)日: 1995-11-07
- 发明人: Toshiyuki Hayakawa , Ryouhei Kirisawa
- 申请人: Toshiyuki Hayakawa , Ryouhei Kirisawa
- 申请人地址: JPX Kanagawa
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kanagawa
- 优先权: JPX5-074886 19930401
- 主分类号: H01L21/76
- IPC分类号: H01L21/76 ; H01L21/8247 ; H01L27/115 ; H01L29/788 ; H01L29/792 ; H01L29/68
摘要:
A non-volatile semiconductor memory device includes NAND type memory cells arranged in a matrix pattern over a semiconductor substrate and channel stopper layers, provided on the substrate, for separating adjacent NAND type memory cells. Each NAND type memory cell includes memory cell transistors having drains and sources mutually connected in series, a source side select transistor connected to a source of one end transistor of the memory cell transistors, and a drain side select transistor connected to a drain of the other end transistor of the memory cell transistors. Each channel stopper layer has a first layer portion for separating the source side select transistors and a second layer portion for separating the memory cell transistors. Impurity concentration of the first layer portion is lower than that of the second layer portion.
公开/授权文献
- US6144097A Semiconductor device and method of fabricating the same 公开/授权日:2000-11-07