发明授权
- 专利标题: Test sequence generation method
- 专利标题(中): 测试序列生成方法
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申请号: US948353申请日: 1992-09-23
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公开(公告)号: US5483543A公开(公告)日: 1996-01-09
- 发明人: Toshinori Hosokawa , Akira Motohara , Mitsuyasu Ohta
- 申请人: Toshinori Hosokawa , Akira Motohara , Mitsuyasu Ohta
- 申请人地址: JPX Osaka
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: JPX Osaka
- 优先权: JPX3-250883 19910930
- 主分类号: G01R31/3183
- IPC分类号: G01R31/3183 ; G06F11/22 ; G06F11/26 ; G06F17/50 ; G06F11/27 ; G06F11/273
摘要:
A method for generating a test sequence for a fault in a sequential circuit to provide high fault coverage. In one embodiment (FIG. 1), a circuit state, which a system fails to justify, is stored as an illegal state in a step 107. In a step 103, a target fault is selected. In a step 104, the system performs its fault propagation processing to generate a test sequence and propagate the target fault from a fault location to any external output pin in such a manner that the circuit state does not coincide with the illegal state set stored in the step 107, and judges the success or failure of the sequence generation. In a step 105, the system performs its state initialization processing to generate a test sequence and transfer the state of the circuit from its initial state to a state when the fault was sensitized in such a manner that the circuit state does not coincide with the illegal state set stored in the step 107, and judges the success or failure of the sequence generation. Since the circuit state when the system fails to justify the state is stored as the illegal state so that a circuit state at the time of generating a subsequent test sequence is prevented from coinciding with the illegal state set, the possibility of the successful test sequence generation can be increased and thus the test sequence generation system can achieve high fault coverage.
公开/授权文献
- US5993075A Vertical cavity surface-emitting laser package 公开/授权日:1999-11-30