发明授权
US5506971A Method and apparatus for performing a snoop-retry protocol in a data
processing system
失效
用于在数据处理系统中执行窥探重试协议的方法和装置
- 专利标题: Method and apparatus for performing a snoop-retry protocol in a data processing system
- 专利标题(中): 用于在数据处理系统中执行窥探重试协议的方法和装置
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申请号: US386252申请日: 1995-02-09
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公开(公告)号: US5506971A公开(公告)日: 1996-04-09
- 发明人: James B. Gullette , William C. Moyer , Michael J. Garcia
- 申请人: James B. Gullette , William C. Moyer , Michael J. Garcia
- 申请人地址: IL Schaumburg
- 专利权人: Motorola, Inc.
- 当前专利权人: Motorola, Inc.
- 当前专利权人地址: IL Schaumburg
- 主分类号: G06F13/362
- IPC分类号: G06F13/362 ; G06F12/08 ; G06F13/364 ; G06F13/14 ; G06F13/42
摘要:
A data processing system (10) and method for performing a snoop-retry protocol using an arbiter (14). Multiple bus masters (12, 16, 17) are coupled to multiple shared buses (20, 22, 24, 26). Each bus master (12, 16, 17) may initiate a bus transaction ("initiating master"), or snoop the bus transaction ("snooping bus master") occurring on a shared bus (20). When an initiating processor requests access to a dirty cache line in a memory (18), a snooping bus master asserts a shared address retry (ARTRY*) signal to inform the initiating processor to relinquish ownership of the shared bus (20) and retry the bus transaction. Upon detecting the shared ARTRY* signal, all potential bus masters remove their bus requests and ignore any bus grants from the arbiter (14), thus allowing the snooping processor which asserted the ARTRY* signal to gain ownership of the shared bus (20) to perform the snoop copyback. The arbiter (14) provides simple arbitration support to guarantee the update of the memory (18) has the highest priority among masters ( 12, 16, 17).
公开/授权文献
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