发明授权
- 专利标题： Very low noise, wide frequency range phase lock loop
- 专利标题（中）： 噪音极低，频率范围宽的锁相环
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申请号： US442850申请日： 1995-05-17
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公开(公告)号： US5515012A公开(公告)日： 1996-05-07
- 发明人: Bharat Bhushan , Christopher G. Arcus , Paul D. Ta
- 申请人： Bharat Bhushan , Christopher G. Arcus , Paul D. Ta
- 申请人地址： CA San Jose
- 专利权人： VLSI Technology, Inc.
- 当前专利权人： VLSI Technology, Inc.
- 当前专利权人地址： CA San Jose
- 主分类号： H03K3/0231
- IPC分类号： H03K3/0231 ; H03K3/03 ; H03L7/099 ; H03B5/04
摘要：
A ring-style, multi-stage VCO of a phase lock loop circuit includes two or more differential amplifier stages. The phase lock loop includes a lowpass filter connected between a control voltage terminal and a voltage-to-current converter stage, which includes a first source-follower MOS transistor M1 with a source resistor R1 and a second diode-connected MOS transistor M2 connected to its drain terminal. A differential amplifier stage includes a current-source MOS transistor M10 having a gate terminal connected to the drain of the first MOS transistor M1 to current mirror the drain current of M1. The differential amplifier stage also includes a pair of MOS transistors M4 and M5 connected to the drain terminal of the current-source MOS transistor M10. The gate terminal of MOS transistor M4 is an IN terminal and the gate terminal of MOS transistor M5 is an IN.sub.-- terminal. The drain terminal of MOS transistor M4 provides an OUT.sub.-- signal for the differential amplifier stage and the drain terminal of MOS transistor M5 provides an OUT signal for the differential amplifier stage. A MOS transistor M6 forms a load impedance for MOS transistor M4 and a MOS transistor M7 forms a load impedance for MOS transistor M5. The gate terminals of M6 and M7 are connected to the voltage control input terminal of the phase lock loop.
公开/授权文献
- US5027711A Propulsion mechanism for a subcaliber projectile 公开/授权日：1991-07-02