发明授权
- 专利标题: Dielectric structure for anti-fuse programming element
- 专利标题(中): 反熔丝编程元件的介质结构
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申请号: US228257申请日: 1994-04-15
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公开(公告)号: US5521423A公开(公告)日: 1996-05-28
- 发明人: Hiroshi Shinriki , Takeshi Kaizuka , Tomohiro Ohta
- 申请人: Hiroshi Shinriki , Takeshi Kaizuka , Tomohiro Ohta
- 申请人地址: JPX Hyogo-ken
- 专利权人: Kawasaki Steel Corporation
- 当前专利权人: Kawasaki Steel Corporation
- 当前专利权人地址: JPX Hyogo-ken
- 优先权: JPX5-090318 19930419; JPX5-090319 19930419; JPX5-092960 19930420
- 主分类号: H01L23/525
- IPC分类号: H01L23/525 ; H01L29/04 ; H01L27/10 ; H01L29/00
摘要:
An antifuse element suitable for use in FPGA. When a device is miniaturized to reduce the write voltage in an antifuse element and as the film thickness of the antifuse dielectric film is being reduced, the dielectric breakdown voltage is greatly variable due to the irregularity of the underlying metal. If the dielectric film is formed by a metal oxide having a relatively high specific permitivity without changing its parasitic capacity as compared to the prior art, the film thickness of the dielectric film can be increased in comparison with oxide and nitride films formed according to the prior art. The irregularity of the underlying metal can be reduced by coating it with a metal nitride or TiB film or TiC film. To equalize the dielectric breakdown voltage, another insulation film having a film thickness such that the direct tunnel conduction is dominant is formed below the metal oxide. To reduce the irregularity of the metal surface and to reduce the resistance after dielectric breakdown, an amorphous silicon layer is deposited before the metal oxide is deposited thereover to form a laminated film.