Invention Grant
- Patent Title: Pipelined analog-to-digital converter
- Patent Title (中): 流水线模数转换器
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Application No.: US12759Application Date: 1993-02-03
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Publication No.: US5534864APublication Date: 1996-07-09
- Inventor: Koichi Ono , Yoshito Nejime , Etsuji Yamamoto
- Applicant: Koichi Ono , Yoshito Nejime , Etsuji Yamamoto
- Applicant Address: JPX Tokyo JPX Tokyo
- Assignee: Hitachi, Ltd.,Hitachi VLSI Engineering Corp.
- Current Assignee: Hitachi, Ltd.,Hitachi VLSI Engineering Corp.
- Current Assignee Address: JPX Tokyo JPX Tokyo
- Priority: JPX4-017453 19920203
- Main IPC: H03M1/14
- IPC: H03M1/14 ; H03M1/06 ; H03M1/16
Abstract:
A pipelined A/D converter which minimizes differential non-linearity by preventing mismatching between converting stages. The A/D converter includes a plurality of converting stages connected in a cascade form wherein each of the converting stages includes an ADC unit for converting an analog input into a digital output. The digital outputs from said converting stages form a conversion output. Each preceding converting stage except a last converting stage further includes an amplifier for deriving and amplifying a conversion residue representing a quantization error resulting from the conversion performed by the preceding converting stage based on the digital output outputted by the ADC unit of the preceding converting stage and the analog input inputted to the preceding converting stage. The amplified conversion residue from the preceding converting stage is supplied as an analog input to a succeeding converting stage. A connector is provided for connecting the amplifier of the preceding converting stage to a node in the ADC unit of the succeeding converting stage. The node provides a base voltage to the ADC unit of the succeeding converting stage.
Public/Granted literature
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