发明授权
US5554558A Method of making high precision w-polycide-to-poly capacitors in digital/analog process 失效
在数字/模拟过程中制造高精度w-polycide-to-poly电容器的方法

Method of making high precision w-polycide-to-poly capacitors in
digital/analog process
摘要:
A method for making a polycide-to-polysilicon capacitor, which has a reduced IPO thickness and low voltage coefficient, is described. A first layer of doped polysilicon is formed over a silicon substrate. A silicide layer is formed over the first layer of doped polysilicon. The first layer of doped polysilicon and the silicide layer are patterned to form a polycide bottom plate of the capacitor. An oxide layer is formed over the bottom plate. The oxide layer is densified. A second layer of doped polysilicon is formed over the oxide layer. The second layer of polysilicon is patterned to form a top plate of the capacitor. The oxide layer is removed except under the top plate of the capacitor, where it acts as a capacitor dielectric, and, finally, the bottom plate is annealed.
公开/授权文献
信息查询
0/0