发明授权
US5574894A Integrated circuit data processor which provides external sensibility of
internal signals during reset
失效
集成电路数据处理器,在复位期间提供内部信号的外部灵敏度
- 专利标题: Integrated circuit data processor which provides external sensibility of internal signals during reset
- 专利标题(中): 集成电路数据处理器,在复位期间提供内部信号的外部灵敏度
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申请号: US333658申请日: 1994-11-03
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公开(公告)号: US5574894A公开(公告)日: 1996-11-12
- 发明人: Alexander L. Iles , Joseph Jelemensky , Oded Yishay
- 申请人: Alexander L. Iles , Joseph Jelemensky , Oded Yishay
- 申请人地址: IL Schaumburg
- 专利权人: Motorola, Inc.
- 当前专利权人: Motorola, Inc.
- 当前专利权人地址: IL Schaumburg
- 主分类号: G06F11/22
- IPC分类号: G06F11/22 ; G06F11/36 ; G06F1/04
摘要:
An integrated circuit terminal of a data processing system (10) is used to communicate multiplexed signals with an external device. During a reset operation in which a reset signal is asserted, a desired internal clock signal is driven to the integrated circuit terminal such that an emulation system (52) may use the internal clock signal to synchronize an emulation operation. After the reset signal is negated, the emulation system synthesizes the internal clock signal for use during emulation. External visibility of a write operation to a register which controls pertinent signal parameters is provided via other integrated circuit terminals when the data processor operates in an emulation mode. The external visibility allows the development system to make similar changes to corresponding signal parameters therein. Therefore, the development system is able to accurately synchronize an emulation operation even when signal parameters are modified during operation.
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