发明授权
- 专利标题: PLL circuit
- 专利标题(中): PLL电路
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申请号: US277951申请日: 1994-07-20
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公开(公告)号: US5581584A公开(公告)日: 1996-12-03
- 发明人: Atsushi Inoue , Toshio Hata , Osamu Tamakoshi , Takayasu Komaki
- 申请人: Atsushi Inoue , Toshio Hata , Osamu Tamakoshi , Takayasu Komaki
- 申请人地址: JPX
- 专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人地址: JPX
- 优先权: JPX5-040653 19930726
- 主分类号: H03L7/06
- IPC分类号: H03L7/06 ; H03B1/00 ; H03B7/02 ; H03B7/06 ; H03L7/099 ; H03D3/24
摘要:
A PLL circuit includes a PLLic formed into an integrated circuit; a loop filter for receiving an output signal from the PLLic; a voltage-controlled oscillator having an oscillation frequency which is controlled according to an output signal of the loop filter for applying a controlled oscillation output signal to the PLLic, the voltage-controlled oscillator including a resonator and a negative resistor circuit; wherein a buffer amplifier functioning as a part of the voltage-controlled oscillator is incorporated into the PLLic, and the resonator and the negative resistor circuit of the voltage-controlled oscillator are disposed outside of the PLLic.
公开/授权文献
- USD314005S Ink ribbon cassette 公开/授权日:1991-01-22