发明授权
US5614428A Process and structure for reduction of channeling during implantation of source and drain regions in formation of MOS integrated circuit structures 失效
用于在MOS集成电路结构的形成期间在源极和漏极区域的注入期间减少沟道的工艺和结构

  • 专利标题: Process and structure for reduction of channeling during implantation of source and drain regions in formation of MOS integrated circuit structures
  • 专利标题(中): 用于在MOS集成电路结构的形成期间在源极和漏极区域的注入期间减少沟道的工艺和结构
  • 申请号: US546921
    申请日: 1995-10-23
  • 公开(公告)号: US5614428A
    公开(公告)日: 1997-03-25
  • 发明人: Ashok K. Kapoor
  • 申请人: Ashok K. Kapoor
  • 申请人地址: CA Milpitas
  • 专利权人: LSI Logic Corporation
  • 当前专利权人: LSI Logic Corporation
  • 当前专利权人地址: CA Milpitas
  • 主分类号: H01L21/266
  • IPC分类号: H01L21/266 H01L21/28 H01L21/336 H01L21/265
Process and structure for reduction of channeling during implantation of
source and drain regions in formation of MOS integrated circuit
structures
摘要:
A process and structure are disclosed for inhibiting the channeling of dopant through the polysilicon gate electrode into a semiconductor substrate during implantation of source and drain regions in the substrate during the formation of MOS devices. After deposition over a semiconductor substrate of a polysilicon layer which will be subsequently patterned to form a gate electrode, an amorphous layer of silicon is formed over the polysilicon layer. This amorphous silicon layer is then treated with a material such as a nitrogen-bearing material capable of inhibiting grain growth and recrystallization of the amorphous silicon during subsequent high temperature processing. The amorphous silicon and polysilicon layers are subsequently conventionally patterned to form the gate electrode. The structure is then implanted without channeling of the dopant ions through the gate electrode into the underlying portion of the substrate where the channel of the MOS device will be formed. The presence of the amorphous silicon over the polysilicon gate electrode inhibits the channeling of the implanted ions through the polysilicon layer, due to the amorphous (non-crystalline) structure of the amorphous silicon, while the treatment of the amorphous silicon with the material capable of inhibiting grain growth in the amorphous silicon prevents or inhibits the recrystallization of the amorphous silicon during subsequent processing before or during the implantation step to form the source and drain regions.
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