利索-全球专利检索

  1. 登录
  2. 注册
发明授权
US5619455A Pipeline-operating type memory system capable of reading data from a memory array having data width larger than the output data width 失效
能够从具有大于输出数据宽度的数据宽度的存储器阵列中读取数据的管道操作型存储器系统

Pipeline-operating type memory system capable of reading data from a memory array having data width larger than the output data width
摘要：
A pipeline-operating type memory system is arranged to have a first input unit for receiving a selector address signal for selecting data; a second input unit for receiving at least an address strobe signal, an X address signal and a Y address signal for selecting data; a first unit for receiving the X address signal and the Y address signal, latching these signals utilizing a first clock signal, and continuously outputting at least either of the X and the Y address signals until these address signals are unlatched; and a second unit for latching a selector address data signal output from the first input unit utilizing the first clock signal, and continuously and selectively outputting at least either of the address signal until the signal is unlatched. The memory system operates to transfer data in a manner to suit the pipeline operating cycle at a normal operating mode and at a fast page mode.
摘要（中）：

流水线操作型存储器系统被布置成具有用于接收用于选择数据的选择器地址信号的第一输入单元; 第二输入单元，用于至少接收地址选通信号，X地址信号和Y地址信号，用于选择数据; 用于接收X地址信号和Y地址信号的第一单元，利用第一时钟信号锁存这些信号，并且连续地输出X和Y地址信号中的至少一个，直到这些地址信号被解锁为止; 以及第二单元，用于使用所述第一时钟信号来锁存从所述第一输入单元输出的选择器地址数据信号，并且连续且选择性地输出所述地址信号中的至少一个，直到所述信号被解锁为止。 存储器系统操作以在正常操作模式和快速页模式下以适合流水线操作周期的方式传送数据。

公开/授权文献
信息查询
Global Dossier Espacenet
0/0