A chip carrier socket (10) for use with the LGA chip (110), includes a base (12) having an internal cavity (15) for receiving therein a cover (14) hinged to the base (12) whereby the LGA chip (110) may be sandwiched between the cover (14) and the base (12). A plurality of passageways (22) are formed in the base (12) in a vertical direction for receiving a corresponding number of contacts (100) therein. The cover (14) is moved with regard to the base (12) in both vertical and horizontal directions so that when the socket (10) is in a closed state, the contacts (100) of the socket (10) may abut against the corresponding landing plates (112) disposed on the undersurface of the LGA chip (110) for interconnection.