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US5691225A Method for fabricating semiconductor device having CMOS structure 失效
制造具有CMOS结构的半导体器件的方法

Method for fabricating semiconductor device having CMOS structure
Abstract:
A semiconductor device having a CMOS structure having a low resistivity silicide layer in a source/drain region is fabricated. To realize silicide formation for resistivity reduction of the n-type source/drain region, an impurity-free silicon layer is formed thereon before forming a high melting point metal silicide layer. For the n-type source/drain region, ion implantation is made through the silicon layer. It is thus possible to obtain a shallow junction of the p-type source/drain region, prevent ion implantation time increase and obtain quick fabrication without reducing the ion implantation energy.
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