发明授权
US5708686A Method for receiver-side clock recovery for digital signals 失效
数字信号接收机侧时钟恢复方法

Method for receiver-side clock recovery for digital signals
摘要:
In a method for receiver-side clock recovery for digital signals having a constant bit rate following cell-structured, asynchronous transmission with pauses of different length between individual cells using the loading state of an FIFO memory into which the received digital signals are written, at the start of a transmission the digital signals are initially read with a received clock into the FIFO memory holding multiple cells of the received signals until the FIFO memory is half filled. The digital signals written into the FIFO memory are read out with a readout clock whose frequency is smaller than the frequency of the received clock. During the readout a signal for controlling the frequency of the readout clock is derived from the respective loading state of the FIFO memory.
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