发明授权
- 专利标题： Process for fabricating a fully self-aligned soi mosfet
- 专利标题（中）： 制造完全自对准硅芯片的工艺
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申请号： US497317申请日： 1995-07-03
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公开(公告)号： US5736435A公开(公告)日： 1998-04-07
- 发明人: Suresh Venkatesan , Stephen Poon , Jeffrey Lutze , Sergio Ajuria
- 申请人： Suresh Venkatesan , Stephen Poon , Jeffrey Lutze , Sergio Ajuria
- 申请人地址： IL Schuamburg
- 专利权人： Motorola, Inc.
- 当前专利权人： Motorola, Inc.
- 当前专利权人地址： IL Schuamburg
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L21/84 ; H01L29/786 ; H01L21/00 ; H01L21/3205
摘要：
A process for fabricating a MOSFET on an SOI substrate includes the formation of an active region (14) isolated by field isolation regions (16, 18) and by an insulating layer (12). A recess (26) is formed in the active region (14) using a masking layer (22) having an opening (24) therein. A gate dielectric layer (32) is formed in the recess (26) and a polycrystalline silicon layer (34) is deposited to overlie the masking layer (22), and to fill the recess (26). A planarization process is carried out to form a gate electrode (36) in the recess (26), and source and drain regions (40, 42) are formed in a self-aligned manner to the gate electrode (36). A channel region (44) resides intermediate to the source and drain regions (40, 42) and directly below the gate electrode (36).
公开/授权文献
- US4122854A Electrosurgical apparatus 公开/授权日：1978-10-31
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